The present invention is generally related to output cells for integrated circuits, and more specifically to bus hold and pull-up resistors for output cells.
The complexity of modern field programmable gate arrays (FPGAs) has been increasing dramatically over the last few years. This complexity has allowed an increase in flexibility that has seen the inclusion of multiple circuits provided as functional alternatives for selection by circuit designers. This increased flexibility makes it easier to design an integrated circuit since a required circuit is more likely to be available.
Unfortunately, when two alternatives are provided on an FPGA, the result may be less than optimal. For example, extra die area is consumed, the two cells may conflict with each other, power may be wasted, or other unforeseen problems may arise.
Two cells that may be provided as alternative circuits are bus hold and pull-up circuits. These circuits are commonly used with tri-state output drivers. A bus hold circuit retains the last state on a line. This is particularly useful after a tri-state driver shuts off and before another tri-state driver becomes active. If this line is allowed to float, it may change state due to capacitive coupling from other lines. Even worse, its voltage may approach the threshold voltage of input cells on the line, creating metastability problems. A pull-up circuit pulls the voltage on a line to a supply, typically VCC, in the absence of an active driver on the line. Alternately, it may be used in lieu of an active pull-up device on a tri-state line.
When these cells are conventionally combined, the result is wasted die area since two large resistors are present but only one is used. Also, there is the possibility that both circuits may be enabled. If a bus hold circuit tries to pull a voltage on a line to ground while a pull-up circuit tries to pull it up to VCC, the result is an output voltage between the supplies. As above, this voltage may be near the threshold voltage of one or more input gates on the line, resulting in potential metastable conditions.
Thus, what is needed is an more efficient combination bus hold and pull-up circuit. It would be preferable if the combination saves die area and reduces the possibility of a conflict between the two functions.